Patterson D. Computer Organization and Design RISC-V 2ed 2021.pdf

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In Praise of
Computer Organization and Design: The Hardware/
Software Interface, Sixth Edition
“Textbook selection is often a frustrating act of compromise—pedagogy, content
coverage, quality of exposition, level of rigor, cost.
Computer Organization and
Design
is the rare book that hits all the right notes across the board, without
compromise. It is not only the premier computer organization textbook, it is a
shining example of what all computer science textbooks could and should be.”
—Michael Goldweber,
Xavier University
“I have been using
Computer Organization and Design
for years, from the very first
edition. This new edition is yet another outstanding improvement on an already
classic text. The evolution from desktop computing to mobile computing to Big
Data brings new coverage of embedded processors such as the ARM, new material
on how software and hardware interact to increase performance, and cloud
computing. All this without sacrificing the fundamentals.”
—Ed Harcourt,
St. Lawrence University
“To Millennials:
Computer Organization and Design
is the computer architecture
book you should keep on your (virtual) bookshelf. The book is both old and new,
because it develops venerable principles—Moore’s Law, abstraction, common case
fast, redundancy, memory hierarchies, parallelism, and pipelining—but illustrates
them with contemporary designs.”
—Mark D. Hill,
University of Wisconsin-Madison
“The new edition of
Computer Organization and Design
keeps pace with advances
in emerging embedded and many-core (GPU) systems, where tablets and
smartphones will/are quickly becoming our new desktops. This text acknowledges
these changes, but continues to provide a rich foundation of the fundamentals
in computer organization and design which will be needed for the designers of
hardware and software that power this new class of devices and systems.”
—Dave Kaeli,
Northeastern University
“Computer
Organization and Design
provides more than an introduction to computer
architecture. It prepares the reader for the changes necessary to meet the ever-
increasing performance needs of mobile systems and big data processing at a time
that difficulties in semiconductor scaling are making all systems power constrained.
In this new era for computing, hardware and software must be co-designed and
system-level architecture is as critical as component-level optimizations.”
—Christos Kozyrakis,
Stanford University
“Patterson and Hennessy brilliantly address the issues in ever-changing computer
hardware architectures, emphasizing on interactions among hardware and software
components at various abstraction levels. By interspersing I/O and parallelism concepts
with a variety of mechanisms in hardware and software throughout the book, the new
edition achieves an excellent holistic presentation of computer architecture for the post-
PC era. This book is an essential guide to hardware and software professionals facing
energy efficiency and parallelization challenges in Tablet PC to Cloud computing.”
—Jae C. Oh,
Syracuse University
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Computer Organization and Design
T H E
H A R D W A R E
S O F T W A R E
I N T E R FA C E
SECOND EDITION
David A. Patterson
has been teaching computer architecture at the University of
California, Berkeley, since joining the faculty in 1977, where he held the Pardee Chair
of Computer Science. His teaching has been honored by the Distinguished Teaching
Award from the University of California, the Karlstrom Award from ACM, and the
Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson
received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award
for contributions to RISC, and he shared the IEEE Johnson Information Storage Award
for contributions to RAID. He also shared the IEEE John von Neumann Medal and
the C & C Prize with John Hennessy. Like his coauthor, Patterson is a Fellow of both
AAAS organizations, the Computer History Museum, ACM, and IEEE, and he was
elected to the National Academy of Engineering, the National Academy of Sciences,
and the Silicon Valley Engineering Hall of Fame. He served as chair of the CS division
in the Berkeley EECS department, as chair of the Computing Research Association,
and as President of ACM. This record led to Distinguished Service Awards from ACM,
CRA, and SIGARCH. He received the Tapia Achievement Award for Civic Science and
Diversifying Computing and shared the 2017 ACM A. M. Turing Award with Hennessy.
At Berkeley, Patterson led the design and implementation of RISC I, likely the first
VLSI reduced instruction set computer, and the foundation of the commercial SPARC
architecture. He was a leader of the Redundant Arrays of Inexpensive Disks (RAID)
project, which led to dependable storage systems from many companies. He was
also involved in the Network of Workstations (NOW) project, which led to cluster
technology used by Internet companies and later to cloud computing. These projects
earned four dissertation awards from ACM. In 2016, he became Professor Emeritus at
Berkeley and a Distinguished Engineer at Google, where he works on domain specific
architecture for machine learning. He is also the Vice Chair of RISC-V International
and the Director of the RISC-V International Open Source Laboratory.
John L. Hennessy
was a Professor of Electrical Engineering and Computer Science
at Stanford University, where he has been a member of the faculty since 1977 and was,
from 2000 to 2016, its tenth President. Hennessy is a Fellow of the IEEE and ACM; a
member of the National Academy of Engineering, the National Academy of Science,
and the American Philosophical Society; and a Fellow of the American Academy of
Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for
his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering
Award, and the 2000 John von Neumann Award, which he shared with David Patterson.
In 2017, they shared the ACM A. M. Turing Award. He has also received seven honorary
doctorates.
In 1981, he started the MIPS project at Stanford with a handful of graduate students.
After completing the project in 1984, he took a leave from the university to cofound
MIPS Computer Systems (now MIPS Technologies), which developed one of the first
commercial RISC microprocessors. As of 2006, over 2 billion MIPS microprocessors have
been shipped in devices ranging from video games and palmtop computers to laser printers
and network switches. Hennessy subsequently led the DASH (Director Architecture
for Shared Memory) project, which prototyped the first scalable cache coherent
multiprocessor; many of the key ideas have been adopted in modern multiprocessors.
In addition to his technical activities and university responsibilities, he has continued to
work with numerous start-ups, both as an early-stage advisor and an investor.
He is currently Director of Knight-Hennessy Scholars and serves as non-executive
chairman of Alphabet.
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Computer Organization and Design
T H E
H A R D W A R E
S O F T W A R E
I N T E R FA C E
SECOND EDITION
David A. Patterson
University of California, Berkeley
Google, Inc
John L. Hennessy
Stanford University

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