BR1808.pdf

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BR1808/D
Rev 1
D i g i ta l T V S o lu t i o n s
MCT4000
ATSC Digital Television Video Decoder
ATSC transport demultiplexer, MPEG-2 video decoder for Standard Definition output applications.
The host processor interface is a
32-bit
wide synchronous port and supports DMA
transfers to and from the MCT4000’s exter-
nal memory. Byte swapping is available on
DMA transactions.
The MCT4000 was designed with system
cost and performance as main priorities
allowing our customers to be successful in
their markets.
The MCT4000 is a transport and video
processor for digital television applications
implementing the Advanced Television System
Committee (ATSC) standards. This device
provides the MPEG-2 transport parsing
function for an entire system and decodes an
MPEG-2 MP@HL video Program Elementary
Stream (PES). All ATSC recommended formats
are accepted and resized as necessary to
provide a
480
line by
720
pixel interlaced or
progressive output. The MCT4000 is optimized
for a low cost legacy converter in either a
Digital Set-Top Box (DSTB) or inside the
television itself.
Using a proprietary compression scheme, video
decoding requires only
4
MB of external
SDRAM while maintaining excellent picture
quality. Having this best-in-class compression
implementation greatly reduces memory costs.
An SDRAM controller and arbitration algorithm
is also installed to maximize the memory
access performance and to allow the host
processor to utilize video memory.
On the post processing side, an On-Screen
Display (OSD) is implemented. The OSD
provides up to
256
programmable colors,
including
64
levels of transparency with
30-bit
resolution (Color Look-Up Table).
Additionally, the OSD provides a
16-bit
per pixel
mode that bypasses the CLUT to provide the dis-
play with a full CCIR601 palette of
colors. Hardware support for a
32 x 32
pixel
cursor is implemented with programmable
shape, color and position.
Also integrated is a high performance Digital
Video Encoder (DVE) which supplies a digital
standard definition video output. Composite
video, S-VHS and RGB formats are all supported.
Closed caption insertion capability is provided.
A bi-directional ITU-R
656
interface is used
which allows two different features: receiving an
external digitized analog video source or sending
video information to an external graphics
accelerator/processor or scanning device.
Features
• MPEG-2 System Transport Processor
• MPEG-2 Main Profile at High Level
(MP
@
HL) video decoder
• Image compression/decompression
and post-filtering reduce memory
usage to
4
MB for video decoding
and provide excellent picture quality
•
32-bit
synchronous processor
interface
• Glueless audio processor interface
• NTSC video encoder
• High quality On-Screen Display (OSD)
• Bi-directional ITU-R
656
interface
•
1.8
V operating voltage
•
272
PBGA package
To learn more about Digital TV
solutions using DigitalDNA technology
from Motorola, visit our web site at
http://www.mot-sps.com/ADC
©
2000
Motorola, Inc. All rights reserved. Motorola is a registered trademark, and DigitalDNA, and the DigitalDNA logo are
trademarks of Motorola, Inc. All other brand names appearing in this document are trademarks or registered trademarks
of their respective companies. Motorola reserves the right to make changes without further notice to any products herein.

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