Microprocessor_Interface_Design_Digital_Circuits_and_Concepts.pdf

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Microprocessor Interface Design
ir=1--l
Microprocessor Interface
~Design
Digital circuits and
concepts
J.D. Nicoud
Director of Laboratoire de Microinformatique (LAMI) and Professor at
Ecole Poly technique Federale de Lausanne, Switzerland
CHAPMAN
&
HALL
London . New York . Tokyo . Melbourne . Madras
Published by Chapman
&
Hall, 2-6 Boundary Row, London
SEt
8HN
Chapman
&
Hall, 2-6 Boundary Row, London SEl 8HN, UK
Van Nostrand Reinhold Inc., 115 5th Avenue, New York NY10003, USA
Chapman
&
Hall Japan, Thomson Publishing Japan, Hirakawacho Nemoto
Building, 7F, 1-7-11 Hirakawa-cho, Chiyoda-ku, Tokyo 102, Japan
Chapman
&
Hall Australia, Thomas Nelson Australia, 102 Dodds Street,
South Melbourne, Victoria 3205, Australia
Chapman
&
Hall India, R. Seshadri, 32 Second Main Road, CIT East,
Madras 600 035, India
English language edition 1991
©
1991
Chapman
&
Hall and Masson
Original French language edition -
Circuits Numeriques pour Interfaces
Microprocesseur
-
©
1991 Masson.
ISBN 0 412 45140 9
o
442
31513 9 (USA)
Apart from any fair dealing for the purposes of research or private study, or
criticism or review, as permitted under the UK Copyright Designs and Patents
Act, 1988, this publication may not be reproduced, stored, or transmitted, in
any form or by any means, without the prior permission in writing of the
publishers, or in the case of reprographic reproduction only in accordance
with the terms of the licences issued by the Copyright Licensing Agency in
the UK, or in accordance with the terms of licences issued by the appropriate
Reproduction Rights Organization outside the UK. Enquiries concerning
reproduction outside the terms stated here should be sent to the publishers at
the London address printed on this page.
The publisher makes no representation, express or implied, with regard to
the accuracy of the information contained in this book and cannot accept any
legal responsibility or liability for any errors or omissions that may be made.
A catalogue record for this book is available from the British Library
Library of Congress Cataloging-in-Publication data available
Published with the support o/the DlST
Ministere de
la
Recherche et
de
la
Technologie (France)
'"
Progr~
d' aide
Ii
I'idition d' ouvrages scientifiques et techniques»
Contents
1 Preface
I Integrated circuit technologies
1.1
Electronic elements
1.1.1 Passive components
1.1.2 Bipolar transistors
1.1.3 MOS transistors
1.1.4 Diode logic
1.1.5 Static and dynamic characteristics
1.1.6 Parameter dispersion
1.2 Major logic families
1.2.1 The "74" family
1.2.2 Evolution
1.2.3 TIL circuits
1.2.4 Open collector and emitter
1.2.5 Three-state outputs
1.2.6 CMOS circuits
1.2.7 Open and three-state CMOS outputs
1.2.8 CMOS-TIL compatibility
1.3 Other technologies
1.3.1 NMOS circuits
1.3.2 Dynamic logic
1.3.3 ECL circuits
1.3.4
GaAs
circuits
1.3.5 Fluid and optical logic
1.3.6 Special interfaces
1.4 Implementation
1.4.1 Correct working conditions
1.4.2 Thyristor effect
1.4.3 Electrostatic problems
1.5 Physical devices
1.5.2 Packages
1.5.3 Printed circuits
xiii
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I
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1.5.1 Chips
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IS
IS
IS
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2 Combinational logic
2.1 Signals and logic functions
2.1.1 Logic signals
2.1.2 Positive and negative logic
2.1.3 Decomposition of a logic system
2.1.4 Logic gates
2.1.5 Equivalences
2.1.6 Importance of drawing rules
2.1.7 Rules for inverting circles
2.1.8 Rise and propagation times
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Vl
Digital circuits and concepts
2.2 Implementing a combinational system
2.2.1 Logic expression
2.2.2 Implementation using transistors
2.2.3 Standard VlSI library
2.2.4 Gate arrays
2.2.5 The "74" family
2.2.6 Programmable logic
2.2.7 PROMs
2.3 Transformation of logic fUnctions
2.3.1 Kamaugh maps
2.3.2 Example
2.4 Standard combinational circuits
2.4.1 Available functions
2.5 Simple gates
2.5.1 Gate catalogue
2.5.2 Exercise
2.5.3 Special gates
2.6 Special input gates
2.6.1 Low charge inputs
2.6.2 Hysteresis threshold inputs
2.6.3 Available Schmitt trigger gates
2.7 Special output gates
2.7.1 Buffered outputs
2.7.2 Single state outputs
2.7.3 Applications of open collector gates
2.7.4 Open collector drivers
2.7.5 Three-state outputs
2.7.6 Bus termination
2.7.7 Three-state buffers and drivers
2.7.8 Line drivers
2.7.9 Analog switches
2.8 Switches and encoders
2.8.1 Multiplexors
2.8.2 Decoders
2.8.3 Display decoders
2.8.4 Priority encoders
2.8.5 Parity generators
2.8.6 Error detection and correction
2.9 Comparators and arithmetic circuits
2.9.1 Parallel comparators
2.9.2 Serial comparison
2.9.3 Adders
2.9.4 Arithmetic and logic units
2.9.5 Anticipated report
2.9.6 Multipliers
2.9.7 Barrel shifters
2.9.8 Other circuits
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